Phase-locked loop (“PLL”) circuits are control systems that generate output signals having a phase that is related to an input signal or reference signal. PLL circuits are widely used in communications systems such as telecommunications, radio, computer, and other data communication systems.
It is desirable to have PLLs that operate correctly over a wide range of frequencies. However, wide operating frequency ranges for a small range of voltage controlled oscillator (“VCO”) operating ranges in advanced processing technologies translate in high VCO gains (“Kvco”), which results in greater noise from the input or reference clock. Additionally, high Kvco requires large loop filter capacitors, which increases the overall circuit size, or requires a low-charge pump current, which is more sensitive to charge pump current mismatch, in order to achieve a fixed PLL bandwidth range.